About the job

This role involves working in a cutting-edge SoC team developing ASICs. The successful candidate will collaborate with experts in various aspects of SoC development on state-of-the-art projects. Responsibilities include translating design requirements into RTL, deriving functional requirements for verification, and working with SystemVerilog UVM test benches. Candidates should have experience in digital ASIC design and verification, scripting languages (Perl/Python/TCL), and a willingness to learn additional specialisms like Formal Verification and DevOps. The company offers a competitive salary ranging from £40,000 to £130,000 per year, along with benefits such as a performance-based bonus (10%-20%), hybrid working (3 days on-site), pension contributions, life assurance, income protection, private medical insurance, employee volunteering support, and training opportunities. Visa sponsorship and relocation support are also available.