About the job

This position offers an excellent opportunity to join one of the UK’s leading semiconductor companies as a Senior IC Layout Engineer. The role involves owning the custom layout and verification of analog circuits, cells, blocks, and IP for multi-Gigabit high-speed SerDes up to and beyond 28Gb/s and/or memory IO in advanced semiconductor technology nodes. The engineer will lead chip layout activities and collaborate with design teams to deliver optimized layouts for high-speed circuits such as amplifiers, oscillators, PLLs, DLLs, biasing, regulators, filters, and data converters. Candidates should have hands-on experience in analog circuit layout, parasitic minimization, matching constraints, and ESD requirements, as well as familiarity with semiconductor process technologies like 28nm, 16nm, and 7nm. Expertise with EDA tools such as Cadence Virtuoso, Spectre/HSpice, Calibre/PVS, and EM/IR analysis tools is essential. The company offers a competitive salary, benefits including pension and private medical coverage, and provides visa sponsorship and relocation assistance for qualified candidates. This is a great opportunity for an experienced Analog IC Layout Engineer to advance their career in a high-growth, internationally recognized semiconductor organization.