About the job

An excellent opportunity has arisen to join a global leader in advanced semiconductor technologies as a Design Verification Engineer based in Oxfordshire, England. This role offers the chance to work on cutting-edge 5nm designs, supporting PCIe interfaces, protocols, and NAND flash solutions. While being part of a large international organisation, the UK site combines the feel of a fast-moving startup with the backing of a major company, building on over a decade of SSD design expertise. The ASIC team works across the full development lifecycle—requirements capture, architecture, design, verification, tape-out, and post-silicon support—giving engineers opportunities to broaden or specialise, particularly in UVM-based verification. Responsibilities include tackling complex SoC design challenges such as high-speed interfaces, accelerators, and multi-CPU architectures, with exposure to RTL design, synthesis, FPGA prototyping, and validation. Essential requirements include a Bachelor’s/Master’s in Electronic Engineering, experience in ASIC design/verification, SystemVerilog UVM testbenches, scripting skills, and C understanding. Desirable skills include JasperGold/VC Formal, C/C++, and prior SSD interface experience. The package offers a competitive salary, hybrid work, pension, private health insurance, and visa sponsorship with relocation support for experienced engineers.